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ly6210248 rev. 1.0 1024k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 0 ? revision history revision description issue date rev. 0.1 initial issue oct.14.2007 rev. 0.2 a dded i sb spec. feb.1.2008 rev. 0.3 revised features & ordering information lead free and green package available to green package available added packing type in ordering information deleted t solder in absolute maximun ratings may.20.2009 rev. 0.4 rev. 0.5 revised v dr revised ordering information in page 11 sep.11.2009 aug.30.2010 rev. 0.6 rev.1.0 deleted e grade revised i sb1 in page 4 revised notes item 1 and 2 in page 4 1. v ih (max) = v cc + 2.0v for pulse width less than 6ns. 2. v il (min) = v ss - 2.0v for pulse width less than 6ns. revised ordering information a pr.12.2011 aug.29.2013
ly6210248 rev. 1.0 1024k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 1 ? features ? fast access time : 55/70ns ? low power consumption: operating current : 45/30ma (typ.) standby current : 8 a (typ.) ll-version ? single 4.5v ~ 5.5v power supply ? all inputs and outputs ttl compatible ? fully static operation ? tri-state output ? data retention voltage : 1.5v (min.) ? green package available ? package : 44-pin 400 mil tsop-ii 48-ball 6mm x 8mm tfbga general description the ly6210248 is a 8,388,608-bit low power cmos static random access me mory organized as 1,048,576 words by 8 bits. it is fabricated using very high performance, high reliability cmos technology. its standby current is stable within the range of operating temperature. the ly6210248 is well designed for very low power system applications, and particularly well suited for battery back-up nonvolatile memory application. the ly6210248 operates from a single power supply of 4.5v ~ 5.5v and all inputs and outputs are fully ttl compatible product family product family operating temperature vcc range speed power dissipation standby(i sb1, typ.) operating(icc,typ.) ly6210248 0 ~ 70 4.5 ~ 5.5v 55/70ns 8a(ll) 45/30ma ly6210248(i) -40 ~ 85 4.5 ~ 5.5v 55/70ns 8a(ll) 45/30ma functional block diagram decoder i/o data circuit control circuit 1024kx8 memory array column i/o a0-a19 vcc vss dq0-dq7 ce# we# oe# ce2 pin description symbol description a0 - a19 address inputs dq0 ? dq7 data inputs/outputs ce#, ce2 chip enable inputs we# write enable input oe# output enable input v cc power supply v ss ground nc no connection
ly6210248 rev. 1.0 1024k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 2 ? pin configuration tfbga nc nc a3 a10 a9 a11 a0 a14 a8 a19 we# dq0 dq3 nc a18 vss ce2 a13 nc vcc vcc a15 vss ce# nc dq7 dq4 nc a2 oe# a1 a6 a5 a4 nc 123456 h g c d e f a b a12 nc a17 a7 a16 nc dq1 dq2 nc nc dq6 dq5 nc
ly6210248 rev. 1.0 1024k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 3 ? absolute maximum ratings parameter symbol rating unit voltage on v cc relative to v ss v t1 -0.5 to 6.5 v voltage on any other pin relative to v ss v t2 -0.5 to v cc +0.5 v operating temperature t a 0 to 70(c grade) -40 to 85(i grade) storage temperature t stg -65 to 150 power dissipation p d 1 w dc output current i out 50 ma *stresses greater than those listed under ?absolute maximum rating s? may cause permanent damage to the device. this is a stress rating only and functional operation of the device or any other conditions above t hose indicated in the operational sections of this s pecification is not implied. exposure to the absolute maximum rating c onditions for extended period may affect device reliability. truth table mode ce# ce2 oe# we# i/o operation supply current standby h x x x high-z i sb ,i sb1 x l x x high-z i sb ,i sb1 output disable l h h h high-z i cc ,i cc1 read l h l h d out i cc ,i cc1 write l h x l d in i cc ,i cc1 note: h = v ih , l = v il , x = don't care.
ly6210248 rev. 1.0 1024k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 4 ? dc electrical characteristics parameter symbol test condition min. typ. * 4 max. unit supply voltage v cc 4.5 5.0 5.5 v input high voltage v ih *1 2.4 - v cc +0.3 v input low voltage v il *2 - 0.2 - 0.6 v input leakage current i li v cc R v in R v ss - 1 - 1 a output leakage current i lo v cc R v out R v ss output disabled - 1 - 1 a output high voltage v oh i oh = -1m a 2.4 - - v output low voltage v ol i ol = 2m a - - 0.4 v average operating power supply current i cc cycle time = min. ce# = v il and ce2 = v ih i i/o = 0ma other pins at v il or v ih - 55 - 45 60 ma - 70 - 30 50 ma i cc1 cycle time = 1 s ce# Q 0.2v and ce2 R v cc -0.2v i i/o = 0ma other pins at 0.2v or v cc -0.2v - 6 12 ma standby power supply current i sb ce# = v ih or ce2 = v il other pins at v il or v ih - 0.2 2 ma i sb1 ce# v R cc -0.2v or ce2 Q 0.2v other pins at 0.2v or v cc -0.2v -ll - 8 30 a -lli - 8 50 a notes: 1. v ih (max) = v cc + 2.0v for pulse width less than 6ns. 2. v il (min) = v ss - 2.0v for pulse width less than 6ns. 3. over/undershoot specifications are characterized, not 100% tested. 4. typical values are included for reference only and are not guaranteed or tested. typical values are measured at v cc = v cc (typ.) and t a = 25 capacitance (t a = 25 , f = 1.0mhz) parameter symbol min. ma x unit input capacitance c in - 6 pf input/output capacitance c i/o - 8 pf note : these parameters are guaranteed by devic e characterization, but not production tested. ac test conditions input pulse levels 0.2v to v cc -0.2v input rise and fall times 3ns input and output timing reference levels 1.5v output load c l = 30pf + 1ttl, i oh / i ol = -1ma/2m a
ly6210248 rev. 1.0 1024k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 5 ? ac electrical characteristics (1) read cycle parameter sym. ly6210248-55 ly6210248-70 unit min. max. min. max. read cycle time t rc 55 - 70 - ns a ddress a ccess time t aa - 55 - 70 ns chip enable access time t ace - 55 - 70 ns output enable access time t oe - 30 - 35 ns chip enable to output in low-z t clz * 10 - 10 - ns output enable to output in low-z t olz * 5 - 5 - ns chip disable to output in high-z t chz * - 20 - 25 ns output disable to output in high-z t ohz * - 20 - 25 ns output hold from address change t oh 10 - 10 - ns (2) write cycle parameter sym. ly6210248-55 ly6210248-70 unit min. max. min. max. write cycle time t wc 55 - 70 - ns a ddress valid to end of write t aw 50 - 60 - ns chip enable to end of write t cw 50 - 60 - ns a ddress set-up time t as 0-0- ns write pulse width t wp 45 - 55 - ns write recovery time t wr 0-0- ns data to write time overlap t dw 25 - 30 - ns data hold from end of write time t dh 0-0- ns output active from end of write t ow * 5 - 5 - ns write to output in high-z t whz * - 20 - 25 ns *these parameters are guaranteed by device c haracterization, but not production tested.
ly6210248 rev. 1.0 1024k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 6 ? timing waveforms read cycle 1 (address controlled) (1,2) dout data valid t oh t aa address t rc previous data valid read cycle 2 (ce# and ce2 and oe# controlled) (1,3,4,5) dout data valid t oh oe# high-z high-z t clz t olz t oe t chz t ohz ce2 t ace ce# t aa address t rc notes : 1.we# is high for read cycle. 2.device is continuously selected oe# = low, ce# = low ., ce2 = high . 3.address must be valid prior to or coincident with ce# = low , ce2 = high; otherwise t aa is the limiting parameter. 4.t clz , t olz , t chz and t ohz are specified with c l = 5pf. transition is measured 500mv from steady state. 5.at any given temperature and voltage condition, t chz is less than t clz , t ohz is less than t olz.
ly6210248 rev. 1.0 1024k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 7 ? write cycle 1 (we# controlled) (1,2,3,5,6) dout din data valid t dw t dh (4) high-z t whz we# t wp t cw t wr t as (4) t ow ce# t aw address t wc ce2 write cycle 2 (ce# and ce2 controlled) (1,2,5,6) dout din data valid t dw t dh (4) high-z t whz we# t wp t cw ce# t wr t as t aw address t wc ce2 notes : 1.we#, ce# must be high or ce2 must be low during all address transitions. 2.a write occurs during the overlap of a low ce#, high ce2, low we#. 3.during a we#controlled write cycle with oe# low, t wp must be greater than t whz + t dw to allow the drivers to turn off and data to be placed on the bus. 4.during this period, i/o pins are in the out put state, and input signals must not be applied. 5.if the ce#low transition and ce2 high transit ion occurs simultaneously with or after we# low transition, the outputs remain i n a high impedance state. 6.t ow and t whz are specified with c l = 5pf. transition is measured 500mv from steady state.
ly6210248 rev. 1.0 1024k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 8 ? data retention characteristics parameter symbol test cond ition min. typ. max. unit v cc for data retention v dr ce# v R cc -0.2vor ce2 Q 0.2v 1.5 - 5.5 v data retention current i dr v cc = 1.5v ce# v R cc - 0.2v or ce2 Q 0.2v other pins at 0.2v or v cc - 0.2v -ll - 5 30 a -lli - 5 50 a chip disable to data retention time t cdr see data retention waveforms (below) 0 - - ns recovery time t r t rc * - - ns t rc * = read cycle time data retention waveform low vcc data retention waveform (1) ( ce# controlled) vcc ce# v dr R 1.5v ce# v R cc-0.2v vcc(min.) v ih t r t cdr v ih vcc(min.) low vcc data retention waveform (2) (ce2 controlled) vcc ce2 v dr R 1.5v ce2 Q 0.2v vcc(min.) v il t r t cdr v il vcc(min.)
ly6210248 rev. 1.0 1024k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 9 ? package outline dimension 44-pin 400mil tsop-ii package outline dimension symbols dimensions in millmeters dimensions in mils min. nom. max. min. nom. max. a - - 1.20 - - 47.2 a1 0.05 0.10 0. 15 2.0 3.9 5.9 a2 0.95 1.00 1. 05 37.4 39.4 41.3 b 0.30 - 0.45 11.8 - 17.7 c 0.12 - 0.21 4.7 - 8.3 d 18.212 18.415 18.618 717 725 733 e 11.506 11.760 12.014 453 463 473 e1 9.957 10.160 10.363 392 400 408 e - 0.800 - - 31.5 - l 0.40 0.50 0. 60 15.7 19.7 23.6 zd - 0.805 - - 31.7 - y - - 0.076 - - 3 0 o 3 o 6 o 0 o 3 o 6 o
ly6210248 rev. 1.0 1024k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 10 ? 48-ball 6mm 8mm tfbga package outline dimension
ly6210248 rev. 1.0 1024k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 11 ? ordering information package type access time (speed)(ns) powe r type temperature range( ) packing type lyontek item no. 48pin12mmx20mm tsop-i 55 ultra low power 0 ~70 tray ly6210248ml-55ll tape reel ly6210248ml-55llt -40 ~85 tray ly6210248ml-55lli tape reel ly6210248ml-55llit 70 ultra low power 0 ~70 tray ly6210248ml-70ll tape reel ly6210248ml-70llt -40 ~85 tray ly6210248ml-70lli tape reel ly6210248ml-70llit 48-ball 6mmx8mm tfbga 55 ultra low power 0 ~70 tray ly6210248gl-55ll tape reel ly6210248gl-55llt -40 ~85 tray ly6210248gl-55lli tape reel ly6210248gl-55llit 70 ultra low power 0 ~70 tray LY6210248GL-70LL tape reel LY6210248GL-70LLt -40 ~85 tray LY6210248GL-70LLi tape reel LY6210248GL-70LLit
ly6210248 rev. 1.0 1024k x 8 bit low power cmos sram lyontek inc. reserves the rights to change the specificati ons and products without notice. 5f, no. 2, industry e. rd. ix, science-ba sed industrial park, hsinchu 300, taiwan. tel: 886-3-6668838 fax: 886-3-6668836 12 ? this page is left blank intentionally.

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